Systems and methods for temporarily retiring memory portions
US8843698B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 11, 2012 |
| Grant date | Sep 23, 2014 |
| Priority date | — |
| Expiry date | Oct 11, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1032
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A flash memory apparatus that may include a plurality of memory portions, and a controller operative to reserve for data retention purposes, for at least a first duration of time, only certain memory portions; allocate data, during said first duration of time, only to said certain memory portions, thereby to define a retired memory portion for said first duration of time; determine to copy data from a certain memory portion to a retired memory portion based upon a relationship between effective cycle counts of the certain memory portion and the retired memory portion, an effective cycle count of any memory portion is responsive to a number of erase-write cycles and to an effective duration of time the memory portion had available to recover from erase-write cycles; and copy the data from the certain memory portion to the retired memory portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.