Reset dampener
US8843722B2 · kind B2 · utility
2Cited by
5References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 25, 2010 |
| Grant date | Sep 23, 2014 |
| Priority date | — |
| Expiry date | Sep 9, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4086
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory reset system including a first memory socket and a second memory socket. A reset signal generator can generate a reset signal to the first memory socket. A dampener circuit can receive the reset signal from the reset signal generator and transmit a dampened reset signal to the second memory socket.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.