Integrated circuit and IC manufacturing method
US8847347B2 · kind B2 · utility
0Cited by
4References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2012 |
| Grant date | Sep 30, 2014 |
| Priority date | — |
| Expiry date | Nov 28, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/115
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is an integrated circuit die comprising an active substrate including a plurality of components laterally separated from each other by respective isolation structures, at least some of the isolation structures carrying a further component, wherein the respective portions of the active substrate underneath the isolation structures carrying said further components are electrically insulated from said components. A method of manufacturing such an IC die is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.