Low power receiver for implementing a high voltage interface implemented with low voltage devices
US8847657B2 · kind B2 · utility
0Cited by
15References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2012 |
| Grant date | Sep 30, 2014 |
| Priority date | — |
| Expiry date | Aug 9, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018507
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus comprising a first stage and a second stage. The first stage may be configured to generate an intermediate signal having a first voltage in response to an input signal having a second voltage received from a pad. The second stage may be configured to generate a core voltage in response to the first voltage. The voltage received from the pad may operate at a voltage compliant with one or more published interface specifications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.