Attenuating noise and cross-talk in an audio system by offsetting outputs in phase
US8847682B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Aug 27, 2012 |
| Grant date | Sep 30, 2014 |
| Priority date | — |
| Expiry date | Aug 27, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/03
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An amplifier may include two or more pulse-width modulators (PWMs) controlling respective sets of switches to produce an amplified version of a source signal. The clocking for the amplifier may be controlled to delay signal processing within the PWMs relative to one another in time, thereby providing an effective time offset between the respective edge transitions of the controlling signals provided to the respective sets of switches. The PWMs may count down to zero from the next PWM duty-cycle value when a new data sample is detected, beginning a new count for each new sample, with the PWM outputting a pulse when the counter value is nonzero. A “data-sample-ready” signal may be decoded from a master counter, which may be clocked based on the high speed PWM clock, and the decode value may be adjusted to determine when the PWM should initialize to the next data sample.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.