Stacked amplifier with diode-based biasing
US8847689B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2010 |
| Grant date | Sep 30, 2014 |
| Priority date | — |
| Expiry date | May 14, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/189
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Techniques for improving linearity of amplifiers are described. In an exemplary design, an amplifier (e.g., a power amplifier) may include a plurality of transistors coupled in a stack and at least one diode. The plurality of transistors may receive and amplify an input signal and provide an output signal. The at least one diode may be operatively coupled to at least one transistor in the stack. Each diode may provide a variable bias voltage to an associated transistor in the stack. Each diode may have a lower voltage drop across the diode at high input power and may provide a higher bias voltage to the associated transistor at high input power. The at least one transistor may have higher gain at high input power due to the higher bias voltage from the at least one diode. The higher gain may improve the linearity of the amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.