Fuse circuit, fuse array, semiconductor memory device and method of manufacturing semiconductor device
US8848475B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2011 |
| Grant date | Sep 30, 2014 |
| Priority date | — |
| Expiry date | Jan 22, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A fuse circuit includes a program unit and a sensing unit. The program unit is programmed in response to a program signal and outputs a program output signal in response to a sensing enable signal. The sensing unit outputs a sensing output signal based on the program output signal and the sensing output signal indicates whether the program unit is programmed or not. The program unit includes an anti-fuse cell, a selection transistor, a program transistor and a sensing transistor. The anti-fuse cell includes at least two anti-fuse elements which are connected in parallel and are respectively broken down at different levels of a program voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.