Patent · US Active

System and method for facilitating data transfer using a shared non-deterministic bus

US8848731B2 · kind B2 · utility

1Cited by

69References

18Claims

0Family size

Assignee

QUALCOMM Incorporated · US

Inventors

Srinjoy Das · Irvine, US
Philip Crary · Mission Viejo, US
Alexander M. Raykhman · East Greenwich, US

Key dates

Filing date	Jul 19, 2011
Grant date	Sep 30, 2014
Priority date	—
Expiry date	Mar 2, 2033

Classification

Technology area (CPC G)Physics
CPC primaryG11C7/1039
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

System and method for facilitating data transfer between logic systems and a memory according to various conditions. Embodiments include systems and methods for facilitating and improving throughput of data transfers using a shared non-deterministic bus, a system and method for managing a memory as a circular buffer, and a system and method for facilitating data transfer between a first clock domain and a second clock domain. Embodiments may be implemented individually or in combination.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.