Passive discrete time analog filter
US8849886B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2011 |
| Grant date | Sep 30, 2014 |
| Priority date | — |
| Expiry date | Dec 11, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H15/023
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A discrete-time analog filter including multiple storage cells each coupled to common input and output ports and each including at least one of capacitor and at least one switch. Each cell periodically samples an input signal and contributes to an output signal. At least two cells sample the input signal at different frequencies. The cells may be grouped together into one or more filter taps, where each filter tap may have a specified timing delay. Timing signals of a given tap may be non-overlapping phases of a given frequency. Cells may have a fixed or programmable capacitance associated with a corresponding weighting coefficient, and different taps may have different weighting coefficients. Taps may be coupled to implement a negative weighting coefficient. Programmable gain may be implemented with switches or by tap output coupling including sub-filter summing arrangements. Self-timed cells based on a master clock are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.