Power management for a system on a chip (SoC)
US8850247B2 · kind B2 · utility
3Cited by
10References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2013 |
| Grant date | Sep 30, 2014 |
| Priority date | — |
| Expiry date | Jun 25, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, the present invention includes a method for sending a first link handshake signal between a first subsystem and a power management unit (PMU) of a system on a chip (SoC) to request entry into a power saving state for the first subsystem, sending a second link handshake signal between the first subsystem and the PMU to acknowledge the request, and placing the first subsystem into the power saving state without further signaling between the PMU and the first subsystem. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.