Opcode-specified predicatable warp post-synchronization
US8850436B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2010 |
| Grant date | Sep 30, 2014 |
| Priority date | — |
| Expiry date | Jan 16, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/38885
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present invention sets forth a technique for performing a method for synchronizing divergent executing threads. The method includes receiving a plurality of instructions that includes at least one set-synchronization instruction and at least one instruction that includes a synchronization command, and determining an active mask that indicates which threads in a plurality of threads are active and which threads in the plurality of threads are disabled. For each instruction included in the plurality of instructions, the instruction is transmitted to each of the active threads included in the plurality of threads. If the instruction is a set-synchronization instruction, then a synchronization token, the active mask and the synchronization point is each pushed onto a stack. Or, if the instruction is a predicated instruction that includes a synchronization command, then each active thread that executes the predicated instruction is monitored to determine when the active mask has been updated to indicate that each active thread, after executing the predicated instruction, has been disabled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.