Patent · US Active

Transistor and manufacturing method thereof

US8853691B2 · kind B2 · utility

0Cited by
7References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 14, 2013
Grant dateOct 7, 2014
Priority date
Expiry dateMar 14, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D99/00

Abstract

A transistor and a manufacturing method thereof are provided. The transistor includes a first gate, a second gate disposed on one side of the first gate, a first semiconductor layer, a second semiconductor layer, an oxide layer, a first insulation layer, a second insulation layer, a source, and a drain. The first semiconductor layer is disposed between the first and second gates; the second semiconductor layer is disposed between the first semiconductor layer and the second gate. The oxide layer is disposed between the first semiconductor layer and the second semiconductor layer. The first insulation layer is disposed between the first gate and the first semiconductor layer; the second insulation layer is disposed between the second gate and the second semiconductor layer. The source and the drain are disposed between the first insulation layer and the second insulation layer and respectively disposed on opposite sides of the oxide layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.