System and method of clock generation in high speed serial communication
US8854096B1 · kind B1 · utility
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2References
20Claims
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Key dates
| Filing date | Oct 24, 2013 |
| Grant date | Oct 7, 2014 |
| Priority date | — |
| Expiry date | Oct 24, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0264
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A transmission system may include an oscillator, a serializer, and a driver. The oscillator may generate at least two clock signals. The serializer may modulate a plurality of data streams based upon the at least two clock signals and a plurality of channels of data. The driver may receive and combine the plurality of data streams into a single output data stream, wherein the single output data stream has a clock frequency higher than frequency of each of the at least two clock signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.