Array substrate, liquid crystal panel and display device
US8854568B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2012 |
| Grant date | Oct 7, 2014 |
| Priority date | — |
| Expiry date | Apr 6, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2300/0404
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the disclosed technology provide an array substrate comprising a plurality of pixel units each of which comprises a gate scanning line, a source scanning line, a thin film transistor (TFT), a storage capacitor, and at least one photosensitive transistor, wherein a gate electrode of the photosensitive transistor and a gate electrode of the TFT are connected with the same gate scanning line, a drain electrode of the photosensitive transistor and a drain electrode of the TFT are connected with the storage capacitor, a source electrode of the TFT is connected with the source scanning line, and a source electrode of the photosensitive transistor is connected with its own gate electrode. In addition, the embodiments of the disclosed technology also provide a liquid crystal panel comprising the array substrate and a display device comprising the liquid crystal panel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.