Semiconductor memory device
US8854865B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 16, 2011 |
| Grant date | Oct 7, 2014 |
| Priority date | — |
| Expiry date | Apr 5, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/05
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
To increase a storage capacity of a memory module per unit area, and to provide a memory module with low power consumption, a transistor formed using an oxide semiconductor film, a silicon carbide film, a gallium nitride film, or the like, which is highly purified and has a wide band gap of 2.5 eV or higher is used for a DRAM, so that a retention period of potentials in a capacitor can be extended. Further, a memory cell has n capacitors with different capacitances and the n capacitors are each connected to a corresponding one of n data lines, so that a variety of the storage capacitances can be obtained and multilevel data can be stored. The capacitors may be stacked for reducing the area of the memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.