Silicon photonic chip optical coupling structures
US8855452B2 · kind B2 · utility
19Cited by
10References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 18, 2012 |
| Grant date | Oct 7, 2014 |
| Priority date | — |
| Expiry date | Oct 6, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B6/34
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A silicon photonic chip is provided. An active silicon layer that includes a photonic device is on a front side of the silicon photonic chip. A silicon substrate that includes an etched backside cavity is on a backside of the silicon photonic chip. A microlens is integrated into the etched backside cavity. A buried oxide layer is located between the active silicon layer and the silicon substrate. The buried oxide layer is an etch stop for the etched backside cavity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.