Method for detecting and correcting errors for a memory whose structure shows dissymmetrical behavior, corresponding memory and its use
US8856603B2 · kind B2 · utility
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Key dates
| Filing date | Jun 18, 2009 |
| Grant date | Oct 7, 2014 |
| Priority date | — |
| Expiry date | Feb 4, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/41
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
To produce a memory which resists ion or photon attack, a memory structure is chosen whose memory point behaves asymmetrically with regard to these attacks. It is shown that in this case, it is sufficient to have a reference cell for an identical and periodic storage structure in order to be able to correct all the memory cells assailed by an attack. An error correction efficiency of ½ is thus obtained, with a simple redundancy, whereas the conventional methods make provision, for the same result, to triple the storage, to obtain a less beneficial efficiency of ⅓.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.