Patent · US Active

Diagram layout patterns

US8856730B2 · kind B2 · utility

0Cited by
2References
20Claims
0Family size

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Inventors

Key dates

Filing dateMay 2, 2013
Grant dateOct 7, 2014
Priority date
Expiry dateMay 2, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06T11/60
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Defining a layout of diagram elements can be performed in response to user input that includes one or more declarative statements specifying conditional patterns based on attributes of diagram elements, wherein the conditional patterns define layouts of diagram elements. Implementation of the layouts is dependent on conditions defined in the declarative statements and one or more values of one or more of the attributes. Implementations can further include organizing the conditional patterns as a pattern definition, wherein the pattern definition is stored on a computer readable medium in such a way that the pattern definition is retrievable by an application program that uses the pattern definition to evaluate the conditional patterns using values of attributes of one or more diagram elements. Representations of the diagram elements can be displayed according to the layouts when conditions for implementing the layouts are satisfied.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.