Distortion tolerant processing
US8859312B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 1, 2007 |
| Grant date | Oct 14, 2014 |
| Priority date | — |
| Expiry date | Jan 29, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method of manufacturing an integrated circuit (IC) for driving a flexible display includes depositing a pattern of spatially non-repetitive features in a first layer on a flexible substrate, said pattern of spatially non-repetitive features not substantially regularly repeating in both of two orthogonal directions (x,y) in the plane of the substrate; depositing a pattern of spatially repetitive features in a second layer on said first layer; aligning said second layer and said first layer so as to allow electrical coupling between said non-repetitive features and said repetitive features, wherein distortion compensation is applied during deposition of said repetitive features to enable said alignment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.