Methods for in-situ passivation of silicon-on-insulator wafers

US8859393B2 · kind B2 · utility

Assignee

• SunEdison Semiconductor Limited · SG

Inventors

• Michael J. Ries · Holden, US
• Dale A. Witte · O'Fallon, US
• Anca Stefanescu · O'Fallon, US
• Andrew M. Jones · Wildwood, US

Key dates

• Filing date: Jun 16, 2011
• Grant date: Oct 14, 2014
• Expiry date: Oct 30, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76254
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Methods and systems are disclosed for performing a passivation process on a silicon-on-insulator wafer in a chamber in which the wafer is cleaved. A bonded wafer pair is cleaved within the chamber to form the silicon-on-insulator (SOI) wafer. A cleaved surface of the SOI wafer is then passivated in-situ by exposing the cleaved surface to a passivating substance. This exposure to a passivating substance results in the formation of a thin layer of oxide on the cleaved surface. The silicon-on-insulator wafer is then removed from the chamber. In other embodiments, the silicon-on-insulator wafer is first transferred to an adjoining chamber where the wafer is then passivated. The wafer is transferred to the adjoining chamber without exposing the wafer to the atmosphere outside the chambers.