Protecting data from decryption from power signature analysis in secure applications
US8860465B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 9, 2012 |
| Grant date | Oct 14, 2014 |
| Priority date | — |
| Expiry date | Jul 5, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/046
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Disclosed is a novel circuit able to generate any logic combination possible as a function of the input logic signals. The circuit is described as a 2 input logistic map circuit but may be expanded to 3 or more inputs as required. Further disclosed is a universal logic array with variable circuit topology. A metallization layer and/or a via interconnection between cells in the array elements produce a circuit topology that implements a Boolean function and/or chaotic function and/or a logic function. The novel circuit provides a circuit topology for secure applications with no obvious physical correspondence between control signal values and input to output mapping. Further disclosed is a network which has a power signature independent of input signal state and output transition. This provides a very useful circuit to protect data from decryption from power signature analysis in secure applications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.