High reliability non-volatile static random access memory devices, methods and systems
US8861271B1 · kind B1 · utility
15Cited by
13References
20Claims
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Key dates
| Filing date | Jun 28, 2012 |
| Grant date | Oct 14, 2014 |
| Priority date | — |
| Expiry date | Feb 9, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A device can include a plurality of memory cells, each memory cell including at least one latch circuit coupled between two data nodes, a first nonvolatile section coupled to a first data node, and a second nonvolatile section coupled to a second data node; and each nonvolatile section including at least one switch element in series with a programmable nonvolatile element, the switch element configured to couple the nonvolatile element to the corresponding data node during a high reliability read operation of the memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.