Patent · US Active

Reducing delay and delay variation in a buffer in network communications

US8862797B2 · kind B2 · utility

0Cited by
4References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 18, 2011
Grant dateOct 14, 2014
Priority date
Expiry dateAug 31, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L49/901
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

There are disclosed systems and methods for reducing the average delay and the average delay variation of network communication data in a buffer. The buffer comprises a plurality of memory entries, and associated with the buffer is a read point and a write pointer. The buffer has a depth defined as the number of memory entries in the buffer between the memory entry pointed to by the read pointer and the memory entry pointed to by the write pointer. In one embodiment, at least one of the read pointer and the write pointer is initially set to establish the depth of the buffer to be a first value. The variation of the depth of the buffer is then monitored for a predetermined period of time as network communication data flows through the buffer. The depth of the buffer is then reduced based upon this monitoring.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.