Techniques for global memory management and request processing
US8862832B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2010 |
| Grant date | Oct 14, 2014 |
| Priority date | — |
| Expiry date | Oct 18, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/167
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described are techniques for processing a request to access global memory. For a first processor included on a first of a plurality of boards connected by a fabric, a logical address is determined for a global memory location in a system global memory. A first physical address for the logical address is determined. It is determined whether the first physical address is included in a first global partition of the first board. If so, first processing is performed including updating a memory map to map a window of the first processor's logical address space to a physical memory segment located within the first global partition. Otherwise, if the first physical address is included in a second of the plurality of global partitions physically located on one of the plurality of boards other than said first board, second processing is performed to issue the request over the fabric.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.