Patent · US Active

Integrated circuit scan testing with stop-clock and auto-step features

US8862954B1 · kind B1 · utility

6Cited by
2References
24Claims
0Family size

Assignee

Inventor

Key dates

Filing dateMar 3, 2011
Grant dateOct 14, 2014
Priority date—
Expiry dateApr 20, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/24
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

Apparatus having corresponding methods and computer-readable media comprise a function module to operate according to a clock signal; a clock control module to provide a clock gate signal; and a clock gate module to provide the clock signal to the function module only until the clock control module provides the clock gate signal; wherein the function module includes a plurality of storage elements, wherein the storage elements form a scan chain in response to a mode signal; and wherein the scan chain is configured to shift data stored therein out of the scan chain.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.