Diodes with native oxide regions for use in memory arrays and methods of forming the same
US8866124B2 · kind B2 · utility
3Cited by
8References
28Claims
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Key dates
| Filing date | Feb 2, 2011 |
| Grant date | Oct 21, 2014 |
| Priority date | — |
| Expiry date | Feb 8, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/90
Abstract
In a first aspect, a vertical semiconductor diode is provided that includes (1) a first semiconductor layer formed above a substrate; (2) a second semiconductor layer formed above the first semiconductor layer; (3) a first native oxide layer formed above the first semiconductor layer; and (4) a third semiconductor layer formed above the first semiconductor layer, second semiconductor layer and first native oxide layer so as to form the vertical semiconductor diode that includes the first native oxide layer. Numerous other aspects are provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.