Apparatus, systems and methods for for digital testing of ADC/DAC combination
US8866650B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2011 |
| Grant date | Oct 21, 2014 |
| Priority date | — |
| Expiry date | Dec 7, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/765
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for testing digital-to-analog (DAC) and analog-to-digital converters (ADC) is provided. The circuit applies a code pattern having a plurality of sequential values to the digital to analog converter. A plurality of built-in test switches (BTS) couple at least one tap voltage from the DAC to a test bus and to the ADC as a variable reference input voltage. In one form, the circuit uses incremental digital codes to test for defects in a resistor string, a switch array, and a decode logic that form part of the DAC. In another form, the circuit uses the tap voltages from the DAC to test the comparators that form part of the ADC. Instead of performing time-consuming analog to digital conversions, the functionality of the above mentioned circuitry is tested by varying the code pattern around a reference point and by selecting the appropriate combination of BTS switches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.