Method for efficient parallel testing of time division duplex (TDD) communications systems
US8867372B2 · kind B2 · utility
2Cited by
2References
22Claims
0Family size
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Key dates
| Filing date | May 2, 2012 |
| Grant date | Oct 21, 2014 |
| Priority date | — |
| Expiry date | Sep 7, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L43/0847
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The invention described herein utilizes devices under test (DUTs) outfitted with stored, predefined test sequences, testers equipped with vector-signal generation (VSG) and vector-signal analysis (VSA) functionality, and novel methods for combining loopback and single-ended test functions in order to obtain higher testing efficiency for DUTs using Bluetooth or other time-division duplex (TDD) based communications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.