Patent · US Active

Circuitry system and method for connecting synchronous clock domains of the circuitry system

US8867680B2 · kind B2 · utility

3Cited by

1References

5Claims

0Family size

Assignee

Intel Mobile Communications GmbH · DE

Inventors

Lars Melzer · Dresden, DE
Kay Hesse · Dresden, DE

Key dates

Filing date	Feb 14, 2011
Grant date	Oct 21, 2014
Priority date	—
Expiry date	Sep 21, 2032

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A clock domain separation device and a method for operating the device is provided for separating two clock domains of a bus system in a system-on-chip (SoC). The clock domain separation device is a hardware module that acts as a guarding between the two clock domains that contain either bus end, and is generally applicable with handshake-type bus protocols. The clock domain separation module allows for each clock domain to switch its clock on and off independently from the state of the other clock domains, without risking data loss or protocol violation.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.