Analog-to-digital conversion loop for PS15 and WSS systems

US8872682B2 · kind B2 · utility

Assignee

• STMicroelectronics SA

Inventors

• Vanni Poletto · Trino, IT
• Carlo Antonini · Tradate, IT
• Salvatore Cannavacciuolo · Cornaredo, IT

Key dates

• Filing date: Jun 25, 2013
• Grant date: Oct 28, 2014
• Expiry date: Jun 25, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03M1/48
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

An analog-to-digital conversion loop adapted to generate a digital output signal corresponding to a low-pass filtered replica of an analog input signal, including an analog adder configured to receive the input analog signal and an analog feedback signal, adapted to generate an analog error signal corresponding to the difference between the analog input signal and the analog feedback signal; an analog-to-digital converter having a nonlinear input-output conversion characteristic defining a larger quantization step the more the input to be converted differs from a null value, configured to receive the analog error signal and to generate a corresponding digital error signal a digital integrator configured to receive the digital error signal, configured to generate the digital output signal corresponding to the time integration of the digital error signal; a digital-to-analog converter, configured to receive the digital output signal and to generate the analog feedback signal as analog replica of the digital output signal.