Non-volatile memory device with single-polysilicon-layer memory cells
US8873291B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2013 |
| Grant date | Oct 28, 2014 |
| Priority date | — |
| Expiry date | Jun 25, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6891
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An embodiment of a nonvolatile-memory device includes: a body accommodating at least a first semiconductor well and a second semiconductor well; an insulating structure; and at least one nonvolatile memory cell. The cell includes: at least one first control region in the first well; conduction regions in the second well; and a floating gate region, which extends over portions of the first well and of the second well, is capacitively coupled to the first control region and forms a floating-gate memory transistor with the conduction regions. The insulating structure includes: first insulating regions, which separate the floating gate region from the first control region and from the second well outside the conduction regions and have a first thickness; and second insulating regions, which separate the floating gate region from the first well outside the first control region and have a second thickness greater than the first thickness.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.