Digital front end receiver using DC offset compensation scheme
US8873687B2 · kind B2 · utility
3Cited by
3References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2012 |
| Grant date | Oct 28, 2014 |
| Priority date | — |
| Expiry date | Sep 14, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/0021
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a digital front end receiver using a DC offset compensation scheme. The digital front end receiver includes a DC offset compensation filter configured to remove DC offset components from signals received from a digital mixer and a Cascaded Integrator-Comb (CIC) decimation filter configured to reduce a sampling rate of the signals received from the DC offset compensation block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.