Patent · US Active

Mechanism for facilitating a configurable port-type peripheral component interconnect express/serial advanced technology attachment host controller architecture

US8874820B2 · kind B2 · utility

4Cited by
3References
20Claims
0Family size

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Key dates

Filing dateDec 28, 2010
Grant dateOct 28, 2014
Priority date
Expiry dateAug 28, 2033

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A mechanism for facilitating configuration of port-type Peripheral Component Interconnect Express/Serial Advanced Technology Attachment host controller architecture is described. In one embodiment, an apparatus includes a plurality of PHYs to be used as Peripheral Component Interconnect Express (PCIe) ports and Serial Advanced Technology Attachment (SATA) ports, and logic to facilitate swapping of one or more of the plurality of PHYs between being the PCIe ports and the SATA ports.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.