Systems with programmable heterogeneous memory controllers for main memory
US8874843B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 25, 2013 |
| Grant date | Oct 28, 2014 |
| Priority date | — |
| Expiry date | Jan 25, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A translating memory module is disclosed including a printed circuit board, at least one memory integrated circuit coupled to the printed board, and at least one support chip coupled to the printed circuit board and coupled between the edge connector and the at least one memory integrated circuit. The at least one support chip includes a bi-directional translator to translate between a first memory communication protocol for the at least one memory integrated circuit and a second memory communication protocol for a memory channel differing from the first memory communication protocol. The second memory communication protocol to communicate data, address, and control signals over the memory channel bus to read and write data into the memory of the translating memory module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.