Programmable macros for metal/via programmable gate array integrated circuits
US8875080B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 2013 |
| Grant date | Oct 28, 2014 |
| Priority date | — |
| Expiry date | Dec 4, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A design methodology is provided to fully automate the creation of multiple-personality programmable macros for use in metal/via programmable ICs. Programmability is achieved using programmable switches, each of which may include one or more metal traces and/or vias on one or more layers configured in series, in parallel, or in combination. Multiple overlapping switches may exist in the same location. That is, switches may be defined that use some of the same resources. Any one of the switches may be “turned on,” while the remaining switches remain turned off. As part of the design methodology, different nets or parts of an electrical circuit design are programmed by replacing the switches with hard connections that close the circuit, or with no connections so as to open the circuit, or cause the circuit to remain open. The methodology allows for sharing routing or programming resources to achieve optimize layout area usage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.