Systems and methods for bounding processing times on multiple processing units
US8875146B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 1, 2011 |
| Grant date | Oct 28, 2014 |
| Priority date | — |
| Expiry date | May 13, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention provide improved systems and methods for processing multiple tasks. In one embodiment a method comprises: selecting a processing unit as a master processing unit from a processing cluster comprising multiple processing units, the master processing unit selected to execute master instruction entities; reading a master instruction entity from memory; scheduling the master instruction entity to execute on the master processing unit; identifying an execution group containing the master instruction entity, the execution group defining a set of related entities; when the execution group contains at least one slave instruction entity, scheduling the at least one slave instruction entity to execute on a processing unit other than the master processing unit during the execution of the master instruction entity; and terminating execution of instruction entities related by the execution group when a master instruction entity is executed that is not a member of the execution group.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.