Semiconductor memory device including narrower storage node contact plugs
US8878273B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2012 |
| Grant date | Nov 4, 2014 |
| Priority date | — |
| Expiry date | Oct 28, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/053
Abstract
A semiconductor memory device includes an active region protruding from a substrate. The active region includes first and second doped regions therein and a trench therein separating the first and second doped regions. A buried gate structure extends in a first direction along the trench between first and second opposing sidewalls thereof. A conductive interconnection plug is provided on the first doped region adjacent the first sidewall of the trench, and a conductive landing pad is provided on the second doped region adjacent the second sidewall of the trench. The landing pad has a width greater than that of the second doped region of the active region along the first direction. A conductive storage node contact plug is provided on the landing pad opposite the second doped region. The storage node contact plug has a narrower width than the landing pad along the first direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.