Buried channel transistor and method of forming the same
US8878299B2 · kind B2 · utility
5Cited by
0References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2013 |
| Grant date | Nov 4, 2014 |
| Priority date | — |
| Expiry date | Feb 19, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A semiconductor device may include a plurality of memory cells. The memory cells may be formed with respective fin shaped active regions with respective recesses formed therein. Thicknesses of the fins may be made relatively thicker around the recesses, such as by selective epitaxial growth around the recesses. The additional thicknesses may be asymmetrical so that portions of the fin on one side are larger than an opposite side. Related methods and systems are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.