Patent · US Active

Method for manufacturing insulated-gate MOS transistors

US8878331B2 · kind B2 · utility

0Cited by
6References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 24, 2012
Grant dateNov 4, 2014
Priority date
Expiry dateOct 24, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/038
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for defining an insulator in a semiconductor substrate includes forming a trench in the substrate, forming in the trench an insulating material having its upper surface arranged above the surface of the substrate, and forming a diffusion barrier layer in a portion of the insulating material located above the surface of the semiconductor substrate. Such insulators can be used, for example, to insulate and delineate electronic components or portions of components formed in the substrate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.