Mechanisms for enabling power management of embedded dynamic random access memory on a semiconductor integrated circuit package
US8879346B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2011 |
| Grant date | Nov 4, 2014 |
| Priority date | — |
| Expiry date | Oct 5, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Power management of an embedded dynamic random access memory (eDRAM) by receiving an eDRAM power state transition event and determining both the current power state of the eDRAM and the next power state of the eDRAM from the power states of: a power-on state, a power-off state, and a self-refresh state. Using the current power state and the next power state to determine whether a power state transition is required, and, in the case that a power state transition is required, transition the eDRAM to the next power state. Power management is achieved because transitioning to a power-off state or self-refresh state reduces the amount of power consumed by the eDRAM as compared to the power-on state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.