Systems and methods for fabricating self-aligned memory cell
US8884401B2 · kind B2 · utility
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18Claims
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Key dates
| Filing date | May 20, 2013 |
| Grant date | Nov 11, 2014 |
| Priority date | — |
| Expiry date | May 20, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8836
Abstract
Systems and methods are disclosed to form a resistive random access memory (RRAM) by forming a first metal electrode layer; depositing an insulator above the metal electrode layer and etching the insulator to expose one or more metal portions; depositing a Pr1-X CaXMnO3 (PCMO) layer above the insulator and the metal portions, wherein X is between approximately 0.3 and approximately 0.5, to form one or more self-aligned RRAM cells above the first metal electrode; and depositing a second metal electrode layer above the PCMO layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.