Display driving system using single level data transmission with embedded clock signal
US8884934B2 · kind B2 · utility
10Cited by
0References
19Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 1, 2010 |
| Grant date | Nov 11, 2014 |
| Priority date | — |
| Expiry date | Dec 12, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2370/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display driving system using single level data transmission with embedded clock signals. The display driving system is configured to embed a clock signal of the same level between data signals and transmit these signals as a single level signal, wherein a cycle at which clock signals are embedded is controlled and a data format is constructed such that a control data transmission step can be extended over 2 words.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.