Energy efficiency ethernet with assymetric low power idle
US8885506B2 · kind B2 · utility
1Cited by
1References
15Claims
0Family size
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Key dates
| Filing date | May 23, 2012 |
| Grant date | Nov 11, 2014 |
| Priority date | — |
| Expiry date | Jun 26, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Energy efficient Ethernet with asymmetric low power idle. Low power idle mode is typically leveraged when both direction of a link do not have data traffic to transmit. Such a requirement reduces the application of low power idle due to the frequent existence of data traffic in only one direction. An asymmetric low power idle mode enables reduction in power consumption and signal emissions even when one direction has data traffic to transmit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.