Uniform external and internal interfaces for delinquent memory operations to facilitate cache optimization
US8886887B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2007 |
| Grant date | Nov 11, 2014 |
| Priority date | — |
| Expiry date | Mar 1, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer implemented method, software infrastructure and computer usable program code for improving application performance. A delinquent memory operation instruction is identified. A delinquent memory operation instruction is an instruction associated with cache misses that exceeds a threshold number of cache misses. A directive is inserted in a code region associated with the delinquent memory operation to form annotated code. The directive indicates an address of the delinquent memory operation instruction and a number of memory latency cycles expected to be required for the delinquent memory operation instruction to execute. The information included in the annotated code is used to optimize execution of an application associated with the delinquent memory operation instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.