Patent · US Active

Method and apparatus for current limit test for high power switching regulator

US8887119B2 · kind B2 · utility

0Cited by

4References

20Claims

0Family size

Assignee

ANALOG DEVICES TECHNOLOGY · BM

Inventors

Roger Feng · Shanghai, CN
Junxiao Chen · Shanghai, CN
Bin Shao · Shanghai, CN

Key dates

Filing date	Sep 17, 2013
Grant date	Nov 11, 2014
Priority date	—
Expiry date	Sep 17, 2033

Classification

Technology area (CPC G)Physics
CPC primaryG06F2119/06
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method can reuse at least one pin in demultiplexing (demuxing) a voltage from a pin. The method can be used to set an accurate current limit threshold in a design for test (DFT) phase and, thus, to accurately set a trimming code of a current limiter. The method uses the property that a power MOSFET has almost a same conductive resistance at a large drain current. Thus, the current limit threshold can be set according to an accurate drain-to-source voltage Vds at a small current sink that is less than a maximum current that ATE is able to provide. An accurate voltage Vds can be measured through Kelvin sensing drain and source pins of the power MOSFET, which are connected to a current sense circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.