Patent · US Active

Method of manufacturing transistor, transistor, array substrate and display device

US8889444B2 · kind B2 · utility

1Cited by
4References
13Claims
0Family size

Assignee

Inventor

Key dates

Filing dateNov 28, 2012
Grant dateNov 18, 2014
Priority date
Expiry dateNov 28, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D99/00

Abstract

Embodiments of the present invention provide a method for manufacturing a transistor, a transistor, an array substrate and a display device. The method comprises: forming a first source/drain metal layer on a substrate; forming an insulating layer above the first source/drain metal layer; forming a gate metal layer on the insulating layer; forming a gate insulating layer on the gate metal layer; forming a semiconductor layer above the gate insulating layer; forming an etching blocking layer on the semiconductor layer; forming a second source/drain metal layer above the etching blocking layer; forming an insulating layer above the second source/drain metal layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.