Integrated nano-farad capacitors and method of formation
US8890287B2 · kind B2 · utility
1Cited by
9References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 27, 2010 |
| Grant date | Nov 18, 2014 |
| Priority date | — |
| Expiry date | Nov 2, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/09701
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A high value capacitance per unit area capacitor is fabricated on a substrate 1 by converting a portion of a primary function anti-reflecting conducting layer 36 to a high value dielectric layer 37 by partially oxidizing the conducting layer to form the dielectric layer. The resultant combination is sandwiched between two metal layer electrodes 35 and 55 to complete the capacitor structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.