Semiconductor packages and electronic systems including the same
US8890330B2 · kind B2 · utility
5Cited by
4References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2012 |
| Grant date | Nov 18, 2014 |
| Priority date | — |
| Expiry date | Nov 30, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided are semiconductor packages and electronic systems including the same. A first memory chip may be stacked on a first portion of a substrate. A controller chip may be stacked on a second portion of the substrate, which is different from the first portion. At least one first bonding wire may directly connect the first memory chip with the controller chip. At least one second bonding wire may directly connect the first memory chip with the substrate, and may be electrically connected with the at least one first bonding wire.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.