Patent · US Active

Data interface clock generation

US8890726B2 · kind B2 · utility

0Cited by
2References
20Claims
0Family size

Assignee

Inventor

Key dates

Filing dateFeb 17, 2014
Grant dateNov 18, 2014
Priority date
Expiry dateFeb 17, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L7/033
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

In one embodiment, an apparatus may include a clock generator to generate a first clock signal. The apparatus may also include a serializer to generate serial data based on a transmit clock signal and parallel input data. The apparatus may also include a signal generator to generate at least two differential signals based on the first clock signal and the serial data.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.