Identification, by a master circuit, of two slave circuits connected to a same bus
US8892798B2 · kind B2 · utility
44Cited by
14References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 5, 2011 |
| Grant date | Nov 18, 2014 |
| Priority date | — |
| Expiry date | Dec 28, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4291
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of communication between a master circuit and two slave circuits over a serial bus wherein: the two slave circuits simultaneously transmit their associated identifiers; the two slave circuits simultaneously transmit the inverse of these identifiers; and each slave circuit exploits the combinations present on the bus to determine an order of communication between the two circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.